Simulators

VHDL: Free Symphony Similii Simulator

-- Symphony EDA

VHDL: Free VHDL Simulator of Linux

-- FreeHDL Project

VHDL: GHDL -- a VHDL front-end for the gcc C compiler

-- Tristan Gingold

Scripts & Tools

VMK/LMK: A Real VHDL Makefile Generator

-- Verifica

dc_perl: Enhancing dc_shell Using a Perl Wrapper

-- Steve Golson

Push-button Synthesis: Using dc_perl to do_the_right_thing

-- Steve Golson, Kurt Baty

vpp: A Powerful Verilog Preprocessor

-- Hemi Thaker

LOGSCAN: A Configurable Error Management Tool

-- David Black

run_proj: An ASIC/FPGA Project Productivity Script

-- Fred Meyer, Keith Greeney

Editor modes

Emacs editor modes for Verilog, VHDL, Specman/e, VERA and dc-shell

-- Various authors