Quick Reference Guides

Verilog and VHDL Quick Reference Cards

-- Verifica

e Language Field Guide

-- Verifica

Books

Writing Testbenches -- Functional Verification of HDL Models

-- Janick Bergeron

The Verilog Hardware Description Language

-- Phil Moorby, Don Thomas

VHDL Coding Styles and Methodologies

-- Ben Cohen

Verification Plans -- The 5-day Verification Strategy

-- Peet James

Mailing Lists & Forums

Verification Guild email forum for verification professionals

-- Janick Bergeron

Usenet Newsgroups for engineers -- searchable archives

-- Google Newsgroups

John Cooley is always in DeepChip

-- John Cooley

FAQs

Watch this subcategory for a listing of available Frequently Asked Question (FAQ) listings for HDLs

-- Verifica

Online Training

Specman and e Language Tutorial

-- Avidan Efody

An introduction to Verilog

-- Sanguinetti, McNamara

Just for Fun

Dilbert is my hero!

-- Scott Adams