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You have
heard it in the press, and it's absolutely true -- verification is
the #1 problem in complex SoC and system design, growing to beyond
70% of pre-silicon activity. Even FPGA and board-level designers
can't avoid the verification bottleneck. The verification task is
growing exponentially and product development schedules are
exploding. How can you ensure that your verification project is done
on time and done right? How do you exploit the power of new
verification tools like Synopsys Vera, SystemVerilog, and Verisity Specman Elite? Where can you get quick
access to verification gurus who deeply understand your verification
problems? |
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 Check
out our Verification QuickRamp. This unique consulting package pulls
together methodology training, testplan development, and
verification infrastructure deployment for quickly deploying a
verification project and advanced verification tools. Whether your
project uses Vera, Specman e, Verilog or VHDL, in just
three weeks we help you tackle the 3 crucial aspects of product
verification:
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Methodology infusion. Verifica provides onsite advanced
verification methodology instruction that is customized to the
project team's knowledge needs and to the project's goals. The
lectures are interspersed with joint methodology consulting
tasks and with other hands-on work for the project under
development. The team applies the lessons learned directly and
immediately to their current project, minimizing language and
methodology ramp-up time. |
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Testplan development. Through planning sessions
facilitated by a Verifica Verification Professional, the
project team strategizes on its verification approach and
creates a Conformance Verification Plan. This document
identifies the test strategy and testbenches needed for
verification success and prioritizes them according to project
criticality. In addition, Verifica helps jumpstart the plan
execution by helping create initial testcases. |
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Infrastructure deployment. Verifica collaborates with
your team by fusing the best of your existing
verification infrastructure with a proven, best-practice
verification strategy. All aspects of a modern verification
infrastructure are addressed including test harness definition
and bus functional model strategy, and team workflow issues
like directory structure, scripting, revision control and bug
tracking. Verifica helps take the uncertainty out of how best
to create a world-class verification infrastructure that
ensures schedule predictability and focused teamwork |
We know
that your project and team have special needs and constraints.
That's why we tailor our QuickRamp package to match the project
circumstances and skill level of the team. Our QuickRamp is ideal
for diverse teams of varying needs, including:
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New verification teams or users of new verification tools,
like Synopsys Vera and Verisity Specman Elite, who are looking
for a fast ramp on the language and proven verification best
practices. |
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Engineers who haven't reached the verification productivity
levels they expected from adopting new tools and methods. |
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Seasoned verification teams that simply lack timely access to
other in-house experienced resources. |
Our
QuickRamp helps you establish certainty that your verification
project will complete on-time and with no last minute surprises. And
we know you've invested a lot of money in EDA tools that promise
fantastic productivity potential. Our QuickRamp ensures that your
next verification project gets off the ground quickly and in the
right direction, helping you avoid getting burned by using a new
tool or methodology the wrong way.
We're
ready to work with you and your team, applying our deep knowledge in
verification to your goals. We'll help shorten the time it takes to
get those testbenches written, and you'll see a big leap in the
progress of your critical project. And best of all, the knowledge of
how to do it again stays with you. Contact us today to discuss your
special needs. Contact us and we will
gladly map out a plan for your success:
QuickRamps are available for Vera, Specman e, Verilog
or VHDL projects. To further accelerate project deployment,
Quickramps can also be extended, and can be combined with the
deployment of Verification IP like Synopsys VIP Designware and
Verisity eVCs.
Verifica – verification experts just when and
where you need them. Contact us now. |
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